콘텐츠 본문
논문 해외 국제전문학술지(SCI급) A 192-pW Voltage Reference Generating Bandgap- V-th With Process and Temperature Dependence Compensation
- 학술지 구분 국제전문학술지(SCI급)
- 게재년월 2019-12
- 저자명 Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
- 학술지명 IEEE JOURNAL OF SOLID-STATE CIRCUITS (JSSC)
- 발행처명 IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- 발행국가 해외
- 논문언어 외국어
- 전체저자수 5
논문 초록 (Abstract)
This article presents a methodology to design a circuit to compensate for process skew by exploiting an inherent dimension-dependent effect of process skew on change in the threshold voltage. We design a voltage reference circuit with a hybrid architecture of bandgap reference (BGR) and CMOS reference, which generates a nominal voltage level of (bandgap - threshold). By compensating the process skew of the threshold term with the proposed dimension-induced effect as well as the temperature dependence, the circuit achieves the simultaneous benefits of BGR and CMOS references. For verification, the circuit was fabricated in three wafers of a 0.18-mu m CMOS including extreme slow and fast corners. With an active area of 0.0045 mm(2), it consumes 192 pW at room temperature. Measurement from 45 chips (15 chips per wafer) shows untrimmed process/voltage/temperature variations of 0.53%, 0.020%/V, and 33 ppm/degrees C, respectively.
