콘텐츠 본문
논문 해외 국제전문학술지(SCI급) A micromachined chip-to-board interconnect system using electroplating bonding technology
- 학술지 구분 국제전문학술지(SCI급)
- 게재년월 2008-05
- 저자명 Joung YH (Joung, Yeun-Ho)공동(교신),Allen MG (Allen, Mark G.)
- 학술지명 IEEE TRANSACTIONS ON ADVANCED PACKAGING
- 발행처명 IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- 발행국가 해외
- 논문언어 외국어
- 전체저자수 2
논문 초록 (Abstract)
We demonstrate a micromachined flexible chip-to-board chip interconnect structure for a chip scale package. Micromachined flexible interconnects enable robust operation in high thermal cycling environments, even for high pinout chips due to the flexible interconnect ability to absorb thermal expansion strain. The interconnects on the chip-side and printed wiring board (PWB)-side are united by electroplating bonding technology, a direct bonding technology resulting in solder-free, underfill-free, low temperature joining by means of copper (Cu) electroplating. Over 200 surface micromachined interconnects, which have a thermal relief geometry, are radially arranged on 11 cm substrates. A chip surrogate consisting of glass with integrated platinum (Pt) microheaters mimics a real electronic device under varying thermal loads. The integrated microheaters can simultaneously test mechanical and electrical performance of the interconnects by generation of on-chip temperatures up to 150 C. Lateral and vertical displacement of the interconnects in the thermal environment are measured and simulated. A mechanical reliability test of the chip scale package is successfully performed for 5000 cycles with thermal cycles of 5 min between 40 C to 147 C. No failures were observed during this period.